DE Jobs

Search from over 2 Million Available Jobs, No Extra Steps, No Extra Forms, Just DirectEmployers

Job Information

Intel ASIC Physical Design Senior Engineer in Malaysia

Job Description

If you have a strong technical background in ASIC Physical/Structural Design, would like to broaden your technical breadth and work on most advanced process technology including 3DIC design, this is the position for you. Foundry Services (FS) Design Solutions team is looking for independent, self-motivated candidates with strong technical skills in SOC/IP/ASIC design and/or methodology development to participate in our journey to bring FS Design Platform to world class standard.

As part of Design Solutions team, you will participate in test chip and SOC physical design which include internal and external IPs, such as CPU cores, memory subsystem, high speed IO and/or specialty IPs. You will work on Synthesis, Place and Route in block and/or full chip level, and be able build/construct the design to meet sign off requirements in timing, layout, reliability, formal equivalence, multi voltage/low power design, etc. In addition, our team drives IFS technologies and solutions into our customer's engineering teams and is the customer advocate with internal development teams. You will ensure Intel collaterals and services can continuously meet FS customers' needs that would lead to successful chip tape-outs. Joining this group means you will be representing Intel in enabling customers' satisfying experiences and eventual outcome, financial success.

You will have an opportunity to learn and expand your knowledge on various ASIC physical design domains and will be exposed to various challenges that customers encounter. In this role you may: - execute internal/customer Test Chip design and/or SOC design - support the successful tape-out of customer chips - create and deliver customer training and application notes - provide technical support to FS customers - collaborate with internal teams and EDA vendors on issue resolution - develop methodology and automation to improve design productivity and efficiency - PDK and design collaterals validation, to name a few.

#ifsdsgmy

Qualifications

Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering, or equivalent with preferably at least 5 years of experience in SOC/Analog/IP/ASIC design and/or methodology development.

Preferred Qualifications: - Minimum 3 years of experience in writing and producing software code using languages such as PERL and TCL. - Minimum 5 years of experience in using Synthesis, Place and Route physical design tools and flow, with demonstrated experience in fixing timing, low power, IR drop, layout DRC violations, and successful tape-out of designs in advanced nodes. - Experience in Unix/Linux and shell programming. - Experience in 3DIC design will be an added advantage.

Inside this Business Group

Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

DirectEmployers